1. Field of the Invention
The present invention relates to a semiconductor device manufacturing method and a semiconductor device. More particularly, the invention relates to a method for manufacturing a semiconductor device having a trench isolation structure and to a semiconductor device fabricated by that method.
2. Description of the Background Art
As semiconductor devices including DRAMs (dynamic random access memories) are getting increasingly integrated today, studies are under way to apply what is known as a trench isolation method to their fabrication. The method involves separating elements in much more minute regions than the conventional LOCOS (localized oxidation of silicon) scheme.
In the field of semiconductor devices, there is a known technique for removing from a silicon substrate defects and metal impurities that may adversely affect device characteristics. That technique involves intentionally forming a defective layer (called a gettering layer) in internal regions of the silicon substrate in such a manner that the formed layer will capture those defects and metal impurities from within the substrate. The gettering layer may be fabricated illustratively by implanting oxygen or silicon ions into the silicon substrate.
FIGS. 11A through 11D and 12A through 12C show a flow of conventional processes in which a gettering layer is formed by implanting ions into element isolation regions of a DRAM having a trench isolation structure. Conventionally, as indicated in FIG. 11A, an SiO2film 2 is first formed by CVD on a silicon substrate 1. On the SiO2 film 2 is formed a resist film 3 having openings where element isolation regions are to be fabricated. After the SiO2 film 2 is etched with the resist film 3 used as a mask, the resist film 3 is removed.
The silicon substrate 1 is then etched using the SiO2 film 2 as a mask. This forms a trench 5 for element isolation in the silicon substrate 1, as depicted in FIG. 11B.
Silicon ions are then implanted into the silicon substrate 1. This forms a defective layer called a gettering layer 4 in regions close to the trench 5 in the silicon substrate 1, as shown in FIG. 11C. The gettering layer 4 is formed not only near the bottom of the trench 5 but also in the vicinity of its sides.
After the SiO2 film 2 is removed, an insulation film 6 is deposited into the trench 5, as depicted in FIG. 11D.
Gate electrodes 7 are then formed on the silicon substrate 1 with a gate insulation film interposed therebetween, as shown in FIG. 12A. When impurities are implanted into the substrate using the gate electrodes 7 as a mask, source drain impurity layers 8 and 9 are formed over the surface of the silicon substrate 1.
An insulation layer 10 is formed next by CVD all over the silicon substrate 1, as depicted in FIG. 12B. Formation of the insulation layer 10 is followed by fabrication of bit lines 11 that conduct to the source drain impurity layer 9.
As shown in FIG. 12C, an insulation film 12 is deposited by CVD on the bit lines 11. Thereafter, there is fabricated a memory cell capacitor including a lower electrode 13 conducting to the source drain impurity layer 8, a dielectric film 14, and an upper electrode 15. The memory cell capacitor is topped with an insulation film 16 and aluminum wiring 17.
As outlined above, when the getting layer 4 (defective layer) is conventionally formed in the trench isolation region, that layer 4 also appears on the sides of the trench 5. In that case, the gettering layer 4 may come into contact with the source drain impurity layer 8, as shown in FIG. 12C.
The getting layer 4 in contact with the source drain impurity layer 8 provokes a leak current increase in the source drain impurity layer 8 leading to a deterioration of device characteristics such as retention. This is one disadvantage of the conventionally fabricated gettering layer, i.e., its propensity toward device characteristic degradation.
It is therefore a first object of the present invention to overcome the above and other deficiencies of the prior art and to provide a method for fabricating in a semiconductor device a gettering layer for capturing defects from within a silicon substrate while preventing internal formation of a gettering layer prone to degrade device characteristics.
It is a second object of the present invention to provide a semiconductor device that is manufactured by the inventive method above.
The above objects of the present invention are achieved by a method for manufacturing a semiconductor device having a trench isolation structure. In the method, defect-forming ions are implanted into a silicon substrate so as to form a gettering layer only at a bottom of a trench formed in said silicon substrate.
The above objects of the present invention are also achieved by a method for manufacturing a semiconductor device having a trench isolation structure. In the method, defect-forming ions are implanted into a silicon substrate so as to form a gettering layer in regions where a trench is to be formed in said silicon substrate. Defective elements are captured into said gettering layer from within said silicon substrate. The gettering layer having said defective elements captured therein is removed during formation of said trench in said silicon substrate.
The above objects of the present invention are further achieved by a semiconductor device manufactured by the method described above.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction wit h the accompanying drawings.